Improving amplifier gain has been one of the key topics in electronics. Although many techniques or structures have been created to increase amplifier gain, the increase in gain largely leads to changes in other parameters such as stability and bandwidth. Therefore, the aim of this paper is to investigate basic common-source amplifiers, common-source common-gate structures and current cancellation techniques, a total of five basic circuit structures for increasing amplifier gain, and to compare and analyse them based on some of their parameters. This paper uses a combination of theoretical derivation and simulation and experimental verification to carry out the study. Finally, the advantages and disadvantages of each structure as well as the application scenarios and development prospects are listed. Through this paper, researchers can not only have a basic understanding of the above structures, but also have a more intuitive understanding of the design of amplifiers as a multi-dimensional optimisation problem. It is essential to design the right amplifier for different circuit requirements.

Classifying Steady-State Visual Evoked Potentials (SSVEPs) is crucial for enhancing the performance of Brain-Computer Interface (BCI) systems. This study introduces a new method for SSVEP classification within BCI frameworks, called the Filter Bank and Fourier Transform Convolutional Neural Network (FBFCNN). The FBFCNN model effectively extracts key harmonic features by first segmenting SSVEP signals into multiple sub-bands through a filter bank. Subsequently, the Fast Fourier Transform (FFT) is applied to convert these signals from the time domain into the frequency domain. The generated spectrum's real and imaginary components are then fed into a convolutional neural network (CNN). This method improves SSVEP feature extraction and increases classification accuracy by fusing the advantages of CNNs with filter banks. Experimental results, derived from publicly available SSVEP datasets, show that the FBFCNN model surpasses traditional techniques in both accuracy and Information Transfer Rate (ITR). Offering a reliable and efficient solution for real-time brain signal decoding, the FBFCNN model represents a significant advancement in SSVEP-based BCI systems.

Today, the size of semiconductor devices is still decreasing, which makes the circuit more integrated, faster computing speed, and lower power consumption. But for a single transistor, some performance degrades. One of the important properties is voltage gain, which must be compensated with some special methods in the design. This paper will focus on the discussion and analysis of four methods, which are able to improve the voltage gain. These are cascode amplifier, cascade amplifier, gain boosting, and bootstrapping. In this letter, their respective advantages and disadvantages will be discussed. Furthermore current applications and possible external development of these methods are also important part of this paper. In this part, the discussion will be further expanded and summarized on the basis of previous studies. Hopefully, these studies can help others gain a more comprehensive understanding of these technologies and provide a theoretical basis for future high-performance analog integrated operational amplifier research and design.

Whether portable electronic devices are powered by rectified AC mains or by batteries, the power supply voltage will vary over a large range during operation. In order to ensure a stable power supply voltage, almost all electronic devices must be powered by a voltage regulator. In order to meet the requirements of precision electronic equipment, a linear regulator should be added to the input end of the power supply to ensure a constant power supply voltage and achieve active noise filtering. LDO can help achieve this function. This article first introduces the basic concepts of low-dropout linear regulators and sorts out the advantages of low-dropout linear regulators. Secondly, the parameters that need to be studied for LDO are sorted out, which are also the direction for breakthroughs in LDO research. The third part introduces some basic structures of LDO, including the design of LDO structure without external capacitors, the design of bandgap reference LDO structure, and the design of high PRSS structure. Finally, the application of LDO is roughly summarized, as well as the trends and challenges of LDO development.

Lane detection technology plays an important role in the lane departure warning and adaptive cruise control functions of autonomous vehicle systems. Traditional lane line detection includes experimental steps such as preyreatment, color space conversion, feature extraction, and lane line tracking, but there are still some problems such as recognition accuracy in complex environments and parameter adjustment dependency. To overcome these limitations, this study uses a novel method that can directly predict the parameters of the lane shape model, thus avoiding complex post-processing steps. This research method uses the network structure based on Graph Transformer Networks (GTNS) to capture richer structural information and contextual relationships, thereby improving the accuracy of detection. In terms of feature extraction, Graph Transformer Networks is used to accurately capture the structural information of the lane through the attention mechanism. At the same time, the results in the later stage show that our method has better advantages in accuracy and speed. In short, this optimization scheme not only improves the detection speed but also ensures a certain degree of accuracy. The method will perform better in the future after further optimization such as multi-sensor fusion and real-time optimization.

LCC-HVDC technology, an essential Commutated Converter based on High Voltage Direct Current, is extensively employed in power system. However, because DC side overcurrent has the potential to seriously affect both system stability and equipment dependability, it has long been the focus of LCC-HVDC systems. This research presents an effective overcurrent suppression technique for the LCC-HVDC side overcurrent. This work first explains the damage caused by DC side overcurrent. A defect or abnormal situation in an LCC-HVDC system can result in DC side overcurrent, which can have a number of negative effects, including equipment damage, power grid instability, and system collapse. Therefore, it is imperative to address the DC side overcurrent issue in order to ensure the system's reliability and safe functioning. The overcurrent suppression method is then presented in this study. This research then presents an overcurrent suppression technique. This approach is predicated on a thorough examination of the properties of DC side pass current in conjunction with power electronic device regulation. First, the primary cause of the DC side pass current is identified by examining its source. Next, a control algorithm is created that has real-time monitoring and suppression capabilities for the DC side overcurrent. The method is able to precisely detect the overcurrent and promptly implement the necessary control measures.This study contrasts simulated trials carried out in the actual LCC-HVDC system with the conventional overcurrent suppression technique. The results show that the proposed overcurrent suppression strategy improves stability and reaction speed while effectively suppressing the DC side overcurrent. Furthermore, the method exhibits strong resilience and flexibility across a range of malfunction scenarios and operational contexts.

This study delves into the application of secondary effects, specifically body effect, channel length modulation effect, and subthreshold conduction effect, in the optimization of analog integrated circuits. The research highlights the critical role these effects play in modern circuit design, especially as device dimensions continue to shrink. Through a systematic analysis, the study presents key strategies for mitigating these effects to enhance circuit performance, reliability, and power efficiency. Notably, the implementation of a transient BD scheme in partially analog-assisted D-LDOs (Digital Low Dropout Regulators) has shown a performance improvement of over 10% compared to schemes without this enhancement, while also significantly reducing total coupling. Techniques such as DIBL effect compensation have proven effective in reducing load sensitivity and power consumption. This study provide valuable insights and practical approaches for the design and optimization of high-performance, energy-efficient electronic systems, making a significant contribution to the field of integrated circuit design.

This research presents an innovative SLAM algorithm that integrates Convolutional Neural Networks (CNNs) with LIDAR and stereo vision to significantly enhance the accuracy of environmental modeling and the construction of dense 3D point cloud maps in complex and dynamic surroundings. By processing pre-recorded video data and employing advanced image segmentation techniques, this study achieves a deep fusion of visual and geometric data, resulting in highly detailed and precise 3D representations of the environment. The experimental results demonstrate that this approach effectively detects and excludes dynamic objects, thereby significantly improving the overall quality, robustness, and reliability of the constructed maps. This work represents a substantial advancement in SLAM technology, particularly in its capability to model and capture intricate environmental details under varying conditions, making it a powerful tool for precise environmental mapping.

In dynamic environments, robot path planning and obstacle avoidance are critical tasks, especially in applications such as autonomous driving, industrial automation, and mobile robotics. These tasks are inherently challenging due to the unpredictability of the environment and the need for real-time decision-making. This paper seeks to address these challenges by developing and analyzing both traditional and optimized models for robot navigation. The initial model utilizes a basic Q-learning algorithm, which provides a straightforward approach to learning from the environment but often struggles with the complexity of dynamic scenarios. To this end, an optimized model is developed that combines the Double Deep Q-Learning algorithm (Double DQN) in conjunction with heuristic strategies. The research employs the MATLAB Reinforcement Learning Toolbox to implement and train these models, and utilizes a simulated environment with dynamic obstacles as a testing site. The simulation generates the necessary data to allow for comprehensive testing and evaluation of the models’ performance. The results show that the optimized model greatly exceeds the initial model in terms of path planning efficiency and obstacle avoidance capabilities, and that the combination of advanced reinforcement learning techniques and heuristic strategies is extremely important for enhancing the performance and reliability of robotic systems in complex, dynamic environments, offering valuable insights for future applications in various fields of robotics.

With the rapid development of the microelectronics industry in the world, electronic products are being updated more and more quickly. This has created a growing large market demand for power management chips. Low drop-out linear regulators have become one of the most widely used types of power management chips due to their advantages of high stability, low drop-out voltage, and fast response. This paper is a data collection study and comparison of improvement methods based on high transient response low drop-out linear regulators. It describes the basic principles of LDOs as well as the principles, advantages and disadvantages of different improvement methods. It was found that the method of shortening the overshoot and undershoot durations by constructing transient enhancement circuits was the best in terms of performance among the following research methods. The stability of capacitor-less LDO is harder to control. Using compensation circuits to improve stability will increase circuit complexity. The capacitor-coupled current mirror method has a longer startup time, because it takes some time for it to reach homeostasis. The high complexity and energy consumption of the dual feedback loop structure makes the circuit costly.